学術論文の一覧です

現在45報の論文があります  

学術論文

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N. Arai, N. Takai, B. S. Kumar, H. Kobayashi , “Design of Analog Filter Using Genetic Algorithm,” Key Engineering Materials, vol. 596, pp. 187-194, (Feb. 2014).
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K. Niitsu, K. Sakuma, N. Harigai, D. Hirabayashi, N. Takai, T. J. Yamaguchi, H. Kobayashi , “Design Methodology and Jitter Analysis of a Delay Line for High-Accuracy On-Chip Jitter Measurements,” Key Engineering Materials, vol. 596, pp. 176-180, (Feb. 2014).
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S. Uemori, M. Ishii, H. Kobayashi, D. Hirabayashi, Y. Arakawa, Y. Doi, O. Kobayashi, T. Matsuura, K. Niitsu, Y. Yano, T. Gake, T. J. Yamaguchi, N. Takai , “Multi-bit Sigma-Delta TDC Architecture with Improved Linearity,” Journal of Electronic Testing : Theory and Applications Springer, vol. 29, no. Issue6, pp. 879-892, (Dec. 2013).
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Z. Nosker, Y. Kobori, H. Kobayashi, K. Niitsu, N. Takai, T. Oomori, T. Odaguchi, I. Nakanishi, K. Nemoto, J. Matsuda , “A Small Low Power Boost Regulator Optimized for Energy Harvesting Applications,” Analog Integrated Circuits and Signal Processing Springer, vol. 75, no. Issue2, pp. pp 207-216, (Apr. 2013).
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N. Takai, T. Okada, K. Takahashi, H. Yokoo, S. Miwa, K. Tsushida, H. Iwase, K. Murakami, H. Kobayashi, T. Odaguchi, S. Takayama, T. Oomori, I. Nakanishi, K. Nemoto, J. Matsuda , “Single Inductor Bipolar Outputs DC-DC Converter with Current Mode Control Circuit,” Key Engineering Materials, vol. 534, pp. 220-226, (Feb. 2013).
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Z. Nosker, Y. Kobori, H. Kobayashi, K. Niitsu, N. Takai, T. Oomori, T. Odaguchi, I. Nakanishi, K. Nemoto, J. Matsuda , “A High Efficiency Extended Load Range Boost Regulator Optimized for Energy Harvesting Applications,” Key Engineering Materials, vol. 534, pp. 206-219, (Feb. 2013).
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N. Takai, K. Takahashi, H. Yokoo, S. Miwa, K. Tsushida, H. Iwase, K. Murakami, H. Kobayashi, T. Odaguchi, S. Takayama, T. Oomori, I. Nakanishi, K. Nemoto, J. Matsuda , “Single Inductor DC-DC Converter with Independent Bipolar Outputs using Charge Pump,” Key Engineering Materials, vol. 497, pp. 285-295, (Feb. 2012).
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J. Ye, Z. Nosker, K. Wakabayashi, T. Yagi, O. Yamamoto, N. Takai, K. Niitsu, K. Kato, T. Ootsuki, I. Akiyama, H. Kobayashi , “Architecture of High-Efficiency Digitally-Controlled Class-E Power Amplifier,” Key Engineering Materials, vol. 497, pp. 273-284, (Feb. 2012).
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T. Ogawa, H. Kobayashi, S. Uemori, Y. Tan, S. Ito, N. Takai, T. J. Yamaguchi, K. Niitsu , “Design for Testability That Reduces Linearity Testing Time of SAR ADCs,” IEICE Trans. on Electronics, vol. E94-C, no. No.6, pp. 1061-1064, (Jun. 2011).
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小川 智彦, 松浦 達治, 小林 春夫, 髙井 伸和, 堀田 正生, 傘 昊, 阿部 彰, 八木 勝義, 森 俊彦 , “逐次比較近似ADC コンパレータ・オフセット影響の冗長アルゴリズムによるディジタル補正技術,” 電子情報通信学会論文誌, vol. J93-C, no. No.3, pp. 68-78, (Mar. 2011).
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H. Lin, Pascal Lo Re, K. Iizuka, H. Kobayashi, N. Takai , “Design of Fourth-Order Continous-Time Bandpass ΔΣAD Modulator for RF Sampling,” IEEJ Trans. on Electrical and Electronic Eng., vol. 5, no. No.6, pp. 637-645, (Nov. 2010).
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T. Yagi, H. Kobayashi, Y. Tan, S. Ito, S. Uemori, N. Takai, T. J. Yamaguchi , “Production Test Considerations for Mixed-Signal IC with Background Calibration,” IEEJ Trans. on Electrical and Electronic Eng., vol. 5, no. No.6, pp. 627-631, (Nov. 2010).
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M. Hotta, M. Kawakami, H. Kobayashi, H. San, N. Takai, T. Matsuura, A. Abe, K. Yagi, T. Mori , “SAR ADC Architecture with Digital Error Correction,” IEEJ Trans. on Electrical and Electronic Eng., vol. 5, no. No.6, pp. 651-659, (Nov. 2010).
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林 海軍, 元澤 篤史, 田邉 朋之, ロレ パスカル, 飯塚 邦彦, 小林 春夫, 傘 昊, 髙井 伸和 , “連続時間バンドパスΔΣAD変調器のQ値とループ遅延の影響,” 電子情報通信学会論文誌, vol. J93-A, no. No.2, pp. 107-118, (Feb. 2010).
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T. Ogawa, H. Kobayashi, Y. Takahashi, N. Takai, M. Hotta, H. San, T. Matsuura, A. Abe, K. Yagi, T. Mori , “SAR ADC Algorithm with Redundancy and Digital Error Correction,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E93-A, no. No.2, pp. 415-423, (Feb. 2010).
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髙井 伸和, 熊沢 利昭 , “トランスコンダクタンスパラメータに依存しない低電圧 rail-to-rail OTAの提案,” 電気学会論文誌 C部門, vol. 129, no. No.8, pp. 1551-1552, (Aug. 2009).
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I. Mori, Y Yamada, S. A. Wibowo, M. Kono, H. Kobayashi, Y. Fujimura, N. Takai, T. Sugiyama, I. Fukai, N. Onishi, I. Takeda, J. Matsuda , “EMI Reduction by Spread Spectrum Clocking in Digitally Controlled DC-DC Converters,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. No.4, pp. 1004-1011, (Apr. 2009).
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N. Takai, Y. Fujimura , “Steep down-slope sawtooth wave generator utilizing two triangular waves exclusively,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. No.4, pp. 1019-1023, (Apr. 2009).
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N. Takai, K. Kawai , “Rail-to-rail OTA utilizing linear V-I conversion circuit whose input stage is composed of single channel MOSFETs,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, no. No.4, pp. 832-837, (Apr. 2005).
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髙井 伸和, 折野 秀紀, 山形 慎 , “CMOSFETを用いた電流帰還型Companding積分器の伸長関数の一般化と構成法の提案,” 電子情報通信学会論文誌, vol. J88-A, no. No.4, pp. 550-552, (Apr. 2005).